1. Field of the Invention
Embodiments of the invention generally relate to time stamping processes for data queues.
2. Description of the Related Art
Accurately measuring relative through times of messages from multiple trace sources inside one application specific integrated circuit (ASIC), when there is a first in first out-type (FIFO) buffer between a source or device being traced, and the target or device being used to interpret the trace data, is difficult using typical methods.
Current methods employ the use of a time stamp counter to measure the time within an ASIC; however, this process requires a fairly large counter to be implemented inside the ASIC for accurate timing measurements to be made. Further complicating the problem of accurately measuring the through times for a message, typical methodologies require the accuracy, which is directly proportional to the size, of the time stamps to be scaled down to reduce the bandwidth consumed by counter based time stamps. Further still, in order to reduce power consumption, an additional sleep clock counter is typically used to keep track of time during ASIC deep sleep, which requires the additional counter as well as the process of adjusting the time stamp counter by software after coming out of deep sleep. This further complicates the time stamping process with an additional timer to control and software integration.
Therefore, there is a need for an apparatus and method configured to accurately measure message queue times, while consuming minimal physical hardware overhead and minimal bandwidth.